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» Uncertainty-aware circuit optimization
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HPCA
2005
IEEE
15 years 11 months ago
On the Limits of Leakage Power Reduction in Caches
If current technology scaling trends hold, leakage power dissipation will soon become the dominant source of power consumption in high performance processors. Caches, due to the f...
Yan Meng, Timothy Sherwood, Ryan Kastner
ICCAD
2008
IEEE
138views Hardware» more  ICCAD 2008»
15 years 8 months ago
Fault tolerant placement and defect reconfiguration for nano-FPGAs
—When manufacturing nano-devices, defects are a certainty and reliability becomes a critical issue. Until now, the most pervasive methods used to address reliability, involve inj...
Amit Agarwal, Jason Cong, Brian Tagiku
ARITH
2009
IEEE
15 years 6 months ago
Unified Approach to the Design of Modulo-(2n +/- 1) Adders Based on Signed-LSB Representation of Residues
Moduli of the form 2n ± 1, which greatly simplify certain arithmetic operations in residue number systems (RNS), have been of longstanding interest. A steady stream of designs fo...
Ghassem Jaberipur, Behrooz Parhami
ISCAS
2008
IEEE
121views Hardware» more  ISCAS 2008»
15 years 5 months ago
A novel flash analog-to-digital converter
—In this paper a new ADC architecture of flash type is proposed. This proposed N-bit flash ADC replaces the (2N -1)-toN encoder with two (2N/2 -1)-to-(N/2) encoders to accomplish...
Chia-Nan Yeh, Yen-Tai Lai
ISQED
2008
IEEE
112views Hardware» more  ISQED 2008»
15 years 5 months ago
Robust Analog Design for Automotive Applications by Design Centering with Safe Operating Areas
The effects of random variations during the manufacturing process on devices can be simulated as a variation of transistor parameters. Device degradation, due to temperature or vo...
Udo Sobe, Karl-Heinz Rooch, Andreas Ripp, Michael ...