1217 search results - page 203 / 244 » Uncertainty-aware circuit optimization |
ISQED
2007
IEEE
15 years 5 months ago
2007
IEEE
This paper studies the impact of variability on the noise robustness of logic gates using noise rejection curves (NRCs). NRCs allow noise pulses to be modeled using magnitude-dura...
VLSID
2007
IEEE
15 years 5 months ago
2007
IEEE
As the VLSI technology scales towards the nanometer regime, circuit performance is increasingly affected by variations. These variations need to be considered at an early stage in...
FMCAD
2007
Springer
15 years 5 months ago
2007
Springer
We present a formulation of retiming to minimize the number of registers in a design by iterating a maximum network flow problem. The retiming returned will be the optimum one whi...
AHS
2006
IEEE
15 years 5 months ago
2006
IEEE
Domain-specific reconfigurable arrays have shown to provide an efficient trade-off between flexibility of FPGA and performance of ASIC circuit. Nonetheless, the design of these he...
APCCAS
2006
IEEE
15 years 5 months ago
2006
IEEE
— A data driven approach to design and optimization of low power combinational multipliers is presented. This technique depends on signal gating to avoid un-necessary computation...