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» Uncertainty-aware circuit optimization
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DATE
2006
IEEE
89views Hardware» more  DATE 2006»
15 years 6 months ago
Automatic insertion of low power annotations in RTL for pipelined microprocessors
We propose instruction-driven slicing, a new technique for annotating microprocessor descriptions at the Register Transfer Level (RTL) in order to achieve lower power dissipation....
Vinod Viswanath, Jacob A. Abraham, Warren A. Hunt ...
53
Voted
ISCAS
2006
IEEE
85views Hardware» more  ISCAS 2006»
15 years 6 months ago
Low-power Q-enhancement for parallel LC tanks
A Q-enhancement technique based on active com- vcci pensation of monolithic inductors for parallel resonant LC tanks Cp is presented. Narrowband Q-enhancement is achieved using a h...
Kenneth A. Townsend, James W. Haslett
ISCAS
2006
IEEE
101views Hardware» more  ISCAS 2006»
15 years 6 months ago
Neuromimetic ICs and system for parameters extraction in biological neuron models
—This paper presents an analog neuromimetic integrated circuit and an associated system dedicated for experiments of parameters extraction in biological neuron models. The IC bas...
Sylvain Saïghi, Yannick Bornat, Jean Tomas, S...
ASPDAC
2006
ACM
115views Hardware» more  ASPDAC 2006»
15 years 6 months ago
DraXRouter: global routing in X-Architecture with dynamic resource assignment
In recent years, the X-Architecture is introduced to obtain better performance for integrated circuit physical design. This paper reformulates the global routing problem in X-Archi...
Zhen Cao, Tong Jing, Yu Hu, Yiyu Shi, Xianlong Hon...
94
Voted
ATS
2005
IEEE
56views Hardware» more  ATS 2005»
15 years 6 months ago
Investigations of Faulty DRAM Behavior Using Electrical Simulation Versus an Analytical Approach
Abstract: Fabrication process improvements and technology scaling results in modifications in the characteristics and in the behavior of manufactured memory chips, which also modi...
Zaid Al-Ars, Said Hamdioui, Jörg E. Vollrath