1217 search results - page 207 / 244 » Uncertainty-aware circuit optimization |
DATE
1999
IEEE
15 years 3 months ago
1999
IEEE
Different logic synthesis tasks have been formulated as input encoding problems but restricted to use a minimum number of binary variables. This paper presents an original column ...
IPPS
1998
IEEE
15 years 3 months ago
1998
IEEE
Abstract Oliver Diessel1 and Hossam ElGindy2 1Department of Computer Science and Software Engineering 2Department of Electrical and Computer Engineering The University of Newcastle...
CF
2007
ACM
15 years 3 months ago
2007
ACM
As we enter the era of petascale computing, system architects must plan for machines composed of tens or even hundreds of thousands of processors. Although fully connected network...
101
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DATE
2009
IEEE
15 years 3 months ago
2009
IEEE
Nanometer CMOS scaling has resulted in greatly increased circuit variability, with extremely adverse consequences on design predictability and yield. A number of recent works have...
126
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ICCD
1997
IEEE
15 years 2 months ago
1997
IEEE
Asynchronous systems are being viewed as an increasingly viable alternative to purely synchronous systems. This paper gives an overview of the current state of the art in practica...