1217 search results - page 222 / 244 » Uncertainty-aware circuit optimization |
DAC
2009
ACM
15 years 10 months ago
2009
ACM
In this paper, we present a novel flip-chip routing algorithm for package-board co-design. Unlike the previous works that can consider only either free- or pre-assignment routing,...
DAC
2008
ACM
15 years 10 months ago
2008
ACM
Due to recent advances in microfluidics technology, digital microfluidic biochips and their associated CAD problems have gained much attention, most of which has been devoted to d...
DAC
2008
ACM
15 years 10 months ago
2008
ACM
The creation of an FPGA requires extensive transistor-level design. This is necessary for both the final design, and during architecture exploration, when many different logic and...
DAC
2008
ACM
15 years 10 months ago
2008
ACM
An effective technique to save power during scan based test is to switch off unused scan chains. The results obtained with this method strongly depend on the mapping of scan flip-...
DAC
2007
ACM
15 years 10 months ago
2007
ACM
The drive for low-power, high performance computation coupled with the extremely high design costs for ASIC designs, has driven a number of designers to try to create a flexible, ...