Sciweavers

1217 search results - page 241 / 244
» Uncertainty-aware circuit optimization
Sort
View
SLIP
2005
ACM
15 years 4 months ago
Multilevel full-chip routing with testability and yield enhancement
We propose in this paper a multilevel full-chip routing algorithm that improves testability and diagnosability, manufacturability, and signal integrity for yield enhancement. Two ...
Katherine Shu-Min Li, Chung-Len Lee, Yao-Wen Chang...
ESA
2004
Springer
92views Algorithms» more  ESA 2004»
15 years 4 months ago
Finding Dominators in Practice
The computation of dominators in a flowgraph has applications in several areas, including program optimization, circuit testing, and theoretical biology. Lengauer and Tarjan [30]...
Loukas Georgiadis, Renato Fonseca F. Werneck, Robe...
GECCO
2004
Springer
123views Optimization» more  GECCO 2004»
15 years 4 months ago
Heuristic Methods for Solving Euclidean Non-uniform Steiner Tree Problems
In this paper, we consider a variation of the Euclidean Steiner Tree Problem in which the space underlying the set of nodes has a specified non-uniform cost structure. This proble...
Ian Frommer, Bruce L. Golden, Guruprasad Pundoor
DATE
2003
IEEE
65views Hardware» more  DATE 2003»
15 years 4 months ago
Masking the Energy Behavior of DES Encryption
Smart cards are vulnerable to both invasive and non-invasive attacks. Specifically, non-invasive attacks using power and timing measurements to extract the cryptographic key has d...
Hendra Saputra, Narayanan Vijaykrishnan, Mahmut T....
104
Voted
MICRO
2003
IEEE
109views Hardware» more  MICRO 2003»
15 years 4 months ago
TLC: Transmission Line Caches
It is widely accepted that the disproportionate scaling of transistor and conventional on-chip interconnect performance presents a major barrier to future high performance systems...
Bradford M. Beckmann, David A. Wood