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» Uncertainty-aware circuit optimization
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79
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FPGA
1997
ACM
127views FPGA» more  FPGA 1997»
15 years 1 months ago
General Modeling and Technology-Mapping Technique for LUT-Based FPGAs
We present a general approach to the FPGA technology mapping problem that applies to any logic block composed of lookup tables LUTs and can yield optimal solutions. The connecti...
Amit Chowdhary, John P. Hayes
65
Voted
ICCAD
1997
IEEE
97views Hardware» more  ICCAD 1997»
15 years 1 months ago
Low power logic synthesis for XOR based circuits
An abundance of research e orts in low power logic synthesis have so far been focused on and or or nand nor based logic. A typical approach is to rst generate an initial multi-lev...
Unni Narayanan, C. L. Liu
DAC
2010
ACM
15 years 1 months ago
Carbon nanotube correlation: promising opportunity for CNFET circuit yield enhancement
Carbon Nanotubes (CNTs) are grown using chemical synthesis, and the exact positioning and chirality of CNTs are very difficult to control. As a result, “small-width” Carbon Na...
Jie Zhang, Shashikanth Bobba, Nishant Patil, Alber...
87
Voted
ISMVL
1999
IEEE
133views Hardware» more  ISMVL 1999»
15 years 1 months ago
Ternary Multiplication Circuits Using 4-Input Adder Cells and Carry Look-Ahead
We introduce a new implementation of a ternary adder with four inputs and two outputs. This ternary adder reduces the number of digits in a multiplication compared with a binary m...
Andreas Herrfeld, Siegbert Hentschke
DATE
1997
IEEE
95views Hardware» more  DATE 1997»
15 years 1 months ago
Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications
A design methodology for the synthesis of digital circuits used in high throughput digital modems is presented. The methodology spans digital modem design from the link level to t...
Patrick Schaumont, Serge Vernalde, Luc Rijnders, M...