1217 search results - page 39 / 244 » Uncertainty-aware circuit optimization |
DATE
2010
IEEE
15 years 4 months ago
2010
IEEE
—This paper proposes a circuit optimization approach that can ease the computational burden on the simulation-based circuit optimizers by leveraging simple design equations that ...
TCAD
1998
14 years 10 months ago
1998
— Conventional methods for optimal sizing of wires and transistors use linear resistor-capacitor (RC) circuit models and the Elmore delay as a measure of signal delay. If the RC ...
115
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ISVLSI
2002
IEEE
15 years 4 months ago
2002
IEEE
With technology scaling, power supply and threshold voltage continue to decrease to satisfy high performance and low power requirements. In the past, subthreshold CMOS circuits ha...
89
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AIPS
1994
15 years 13 days ago
1994
Aimsof traditional planners had beenlimited to finding a sequenceof operators rather than finding an optimal or neax-optimalfinal state. Consequent]y, the performanceimprovementsy...
COCO
2009
Springer
15 years 5 months ago
2009
Springer
—We show that the rank of a depth-3 circuit (over any field) that is simple, minimal and zero is at most O(k3 log d). The previous best rank bound known was 2O(k2 ) (log d)k−2...