1217 search results - page 44 / 244 » Uncertainty-aware circuit optimization |
ICCAD
1998
IEEE
15 years 3 months ago
1998
IEEE
Retiming and resynthesis transformations can be used for optimizing the area, power, and delay of sequential circuits. Even though this technique has been known for more than a de...
TCAD
1998
14 years 10 months ago
1998
—A new approach to optimize multilevel logic circuits is introduced. Given a multilevel circuit, the synthesis method optimizes its area while simultaneously enhancing its random...
96
Voted
DAC
1994
ACM
15 years 3 months ago
1994
ACM
New placement techniques are presented which substantially improve the process of automatic layout generation of analog IC's. Extremely tight specifications can be enforced o...
80
Voted
DAC
2010
ACM
15 years 22 days ago
2010
ACM
In this study, we propose the use of specialized influence models to capture the dynamic behavior of a Network-onChip (NoC). Our goal is to construct a versatile modeling framewor...
TC
1998
14 years 10 months ago
1998
—Many built-in self-testing (BIST) schemes compress the test responses from a k-output circuit to q signature streams, where q << k, a process termed space compaction. The ...