1217 search results - page 48 / 244 » Uncertainty-aware circuit optimization |
ICCAD
2003
IEEE
15 years 8 months ago
2003
IEEE
As the size and complexity of VLSI circuits increase, the need for faster floorplanning algorithms also grows. In this work we introduce Traffic, a new method for creating wire- a...
ISCAS
2005
IEEE
15 years 4 months ago
2005
IEEE
— As across-chip wire delays exceed a clock cycle, interconnect pipelining becomes essential. However, the arbitrary insertion of flip-flops can change the differentials of lat...
DATE
2010
IEEE
15 years 4 months ago
2010
IEEE
Abstract—This article discusses system-level techniques to optimize the power-performance trade-off in subthreshold circuits and presents a uniform platform for implementing ultr...
SAT
2010
Springer
14 years 9 months ago
2010
Springer
Previous work has shown that circuit representations can be exploited in QBF solvers to obtain useful performance improvements. In this paper we examine some additional techniques ...
PATMOS
2005
Springer
15 years 4 months ago
2005
Springer
This paper presents a modular optimization framework for custom digital circuits in the power – performance space. The method uses a static timer and a nonlinear optimizer to max...