1217 search results - page 54 / 244 » Uncertainty-aware circuit optimization |
DATE
2006
IEEE
15 years 5 months ago
2006
IEEE
Carry Save Adder (CSA) trees are commonly used for high speed implementation of multi-operand additions. We present a method to reduce the number of the adders in CSA trees by ext...
ICCAD
2004
IEEE
15 years 8 months ago
2004
IEEE
We present techniques for improving the accuracy of geometric-programming (GP) based analog circuit design optimization. We describe major sources of discrepancies between the res...
ICCAD
2000
IEEE
15 years 3 months ago
2000
IEEE
In this paper, we present simulation techniques to estimate the worst-case voltage variation using a RC model for the power distribution network. Pattern independent maximum envel...
ICCAD
2009
IEEE
14 years 9 months ago
2009
IEEE
With increasing process variation, binning has become an important technique to improve the values of fabricated chips, especially in high performance microprocessors where transpa...
ICCAD
2001
IEEE
15 years 8 months ago
2001
IEEE
This paper attempts to determine the capabilities of existing Redundancy Addition and Removal (SRAR) techniques for logic optimization of sequential circuits. To this purpose, we ...