1217 search results - page 55 / 244 » Uncertainty-aware circuit optimization |
78
Voted
DATE
2006
IEEE
15 years 5 months ago
2006
IEEE
Conventional high-level synthesis uses the worst case delay to relate all inputs to all outputs of an operation. This is a very conservative approximation of reality, especially i...
110
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GLVLSI
2006
IEEE
15 years 5 months ago
2006
IEEE
As CMOS devices and operating voltages are scaled down, noise and defective devices will impact the reliability of digital circuits. Probabilistic computing compatible with CMOS o...
DATE
2006
IEEE
15 years 5 months ago
2006
IEEE
Regular expressions are widely used in Network Intrusion Detection System (NIDS) to represent patterns of network attacks. Since traditional software-only NIDS cannot catch up to ...
114
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DATE
2006
IEEE
15 years 5 months ago
2006
IEEE
For CMOS technologies below 65nm, gate oxide direct tunneling current is a major component of the total power dissipation. This paper presents a simulated annealing based algorith...
ICCAD
2009
IEEE
14 years 9 months ago
2009
IEEE
In this paper, we propose a new technique, referred to as virtual probe (VP), to efficiently measure, characterize and monitor both inter-die and spatially-correlated intra-die va...