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1217
search results - page 58 / 244
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Uncertainty-aware circuit optimization
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ICCAD
1999
IEEE
81
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ICCAD 1999
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Robust optimization based backtrace method for analog circuits
15 years 3 months ago
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www.cecs.uci.edu
In this paper, we propose a new robust approach to signal backtrace for efficiently testing embedded analog modules in a large system. The proposed signal backtrace method is form...
Alfred V. Gomes, Abhijit Chatterjee
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51
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ASPDAC
2010
ACM
147
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ASPDAC 2010
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Rule-based optimization of reversible circuits
14 years 9 months ago
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www.asp-dac.itri.org.tw
Mona Arabzadeh, Mehdi Saeedi, Morteza Saheb Zamani
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58
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ASPDAC
2010
ACM
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Simultaneous slack budgeting and retiming for synchronous circuits optimization
14 years 9 months ago
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Shenghua Liu, Yuchun Ma, Xianlong Hong, Yu Wang
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66
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ICCAD
2009
IEEE
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ICCAD 2009
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Joint design-time and post-silicon optimization for digitally tuned analog circuits
14 years 9 months ago
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eda.ee.ucla.edu
Wei Yao, Yiyu Shi, Lei He, Sudhakar Pamarti
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56
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JISE
2011
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JISE 2011
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Design Planning with 3D-Via Optimization in Alternative Stacking Integrated Circuits
14 years 6 months ago
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www.iis.sinica.edu.tw
Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu
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