1217 search results - page 64 / 244 » Uncertainty-aware circuit optimization |
ISPD
1997
ACM
15 years 3 months ago
1997
ACM
In this paper, we present a new approach that performs timing driven placement for standard cell circuits in interaction with netlist transformations. As netlist transformations a...
FPGA
2008
ACM
15 years 22 days ago
2008
ACM
Current advances in chip design and manufacturing have allowed IC manufacturing to approach the nanometer range. As the feature size scales down, greater variability is experience...
ISCA
2010
IEEE
15 years 4 months ago
2010
IEEE
Power consumption has become a major constraint in the design of processors today. To optimize a processor for energyefficiency requires an examination of energy-performance trade...
ISCAS
2003
IEEE
15 years 4 months ago
2003
IEEE
We present a low-power analog circuit for implementing a model of a leaky integrate and fire neuron. Next to being optimized for low-power consumption, the proposed circuit inclu...
ASPDAC
2005
ACM
15 years 1 months ago
2005
ACM
—Dynamic programmable logic arrays (PLAs) which are built of the NOR–NOR structure, have been very popular in high performance design because of their high-speed and predictabl...