1217 search results - page 80 / 244 » Uncertainty-aware circuit optimization |
VLSID
2002
IEEE
15 years 11 months ago
2002
IEEE
We give an algorithm to model any given multiple stuck-at fault as a single stuck-at fault. The procedure requires insertion of at most ? ? ? modeling gates, when the multiplicity...
GLVLSI
2003
IEEE
15 years 4 months ago
2003
IEEE
This paper first presents an accurate and efficient method of estimating the short circuit energy dissipation and the output transition time of CMOS buffers. Next the paper descri...
DAC
1999
ACM
15 years 3 months ago
1999
ACM
Retiming is an optimization technique for synchronous circuits introduced by Leiserson and Saxe in 1983. Although powerful, retiming is not very widely used because it does not ha...
ISPD
1999
ACM
15 years 3 months ago
1999
ACM
- In this paper, we present an algorithm for gate sizing with controlled displacement to improve the overall circuit timing. We use a path-based delay model to capture the timing c...
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TIM
2010
14 years 6 months ago
2010
In this paper, a novel low-power design technique is proposed to minimize the standby leakage power in nanoscale CMOS very large scale integration (VLSI) systems by generating the ...