1217 search results - page 82 / 244 » Uncertainty-aware circuit optimization |
DAC
2010
ACM
15 years 3 months ago
2010
ACM
As the geometry shrinking faces severe limitations, 3D wafer stacking with through silicon via (TSV) has gained interest for future SOC integration. Since TSV fill material and s...
ICCAD
2007
IEEE
15 years 1 months ago
2007
IEEE
– Interconnect issues are becoming increasingly important for ULSI systems. IntSim, an interconnect CAD tool, has been developed to obtain pitches of different wiring levels and ...
102
click to vote
ISPD
1997
ACM
15 years 3 months ago
1997
ACM
Advances in fabrication technology have resulted in a continual shrinkage of device dimensions. This has resulted in smaller device delays, greater resistance along interconnect w...
ICCAD
2007
IEEE
15 years 8 months ago
2007
IEEE
Modern processing technologies offer a number of types of devices such as high-VT , low-VT , thick-oxide, etc. in addition to the nominal transistor in order to meet system perfor...
DATE
2010
IEEE
15 years 4 months ago
2010
IEEE
— The paper introduces novel field programmable gate array (FPGA) circuits based on hybrid CMOS/resistive switching device (memristor) technology and explores several logic archi...