1217 search results - page 84 / 244 » Uncertainty-aware circuit optimization |
ICCAD
2004
IEEE
15 years 8 months ago
2004
IEEE
In this paper we propose a RObust Analog Design tool (ROAD) for post-tuning analog/RF circuits. Starting from an initial design derived from hand analysis or analog circuit synthe...
TCAD
1998
14 years 11 months ago
1998
Abstract—This paper presents an aggressive optimization technique targeting combinational logic circuits. Starting from an initial implementation mapped on a given technology lib...
DATE
2009
IEEE
15 years 6 months ago
2009
IEEE
—In modern sub-micron design, achieving low-skew clock distributions is facing challenges for high-performance circuits. Symmetric global clock distribution and clock tree synthe...
GECCO
2009
Springer
15 years 3 months ago
2009
Springer
A non-uniform cellular automata-based model is presented for the evolutionary development of digital circuits at the gate level. The main feature of this model is the modified lo...
ISCAS
2007
IEEE
15 years 5 months ago
2007
IEEE
—Two probabilistic-based models, namely the Ensemble-Dependent Matrix model [1][3] and the Markov Random Field model [2], have been proposed to deal with faults in nanoscale syst...