1217 search results - page 95 / 244 » Uncertainty-aware circuit optimization |
ICCAD
2000
IEEE
15 years 3 months ago
2000
IEEE
In this paper, we propose a novel fault-oriented test generation methodology for detection and isolation of faults in analog circuits. Given the description of the circuit-underte...
ICCAD
2001
IEEE
15 years 8 months ago
2001
IEEE
: This paper describes ASF, a novel cell-level analog synthesis framework that can size and bias a given circuit topology subject to a set of performance objectives and a manufactu...
DAC
1999
ACM
15 years 3 months ago
1999
ACM
We present a new approach for estimation and optimization of the average stand-by power dissipation in large MOS digital circuits. To overcome the complexity of state dependence i...
ICCAD
2003
IEEE
15 years 8 months ago
2003
IEEE
In this paper, we present a reduced order inodeling methodology, based on the utilization of optimal non-uniform grids generated by Gaussian spectral rules, for the direct passive...
GLVLSI
2005
IEEE
15 years 5 months ago
2005
IEEE
We present simulations for ultra-thin body, fully-depleted, double-gate (DG) silicon-on-insulator (SOI) devices that can be readily optimized for both static power loss and perfor...