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» Uncertainty-aware circuit optimization
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CEC
2008
IEEE
15 years 5 months ago
Automatic model type selection with heterogeneous evolution: An application to RF circuit block modeling
— Many complex, real world phenomena are difficult to study directly using controlled experiments. Instead, the use of computer simulations has become commonplace as a cost effe...
Dirk Gorissen, Luciano De Tommasi, Jeroen Croon, T...
ISBI
2008
IEEE
15 years 5 months ago
An optimal-path approach for neural circuit reconstruction
Neurobiologists are collecting large amounts of electron microscopy image data to gain a better understanding of neuron organization in the central nervous system. Image analysis ...
Elizabeth Jurrus, Ross T. Whitaker, Bryan W. Jones...
ICCD
2008
IEEE
165views Hardware» more  ICCD 2008»
15 years 8 months ago
Analysis and minimization of practical energy in 45nm subthreshold logic circuits
Abstract— Over the last decade, the design of ultra-lowpower digital circuits in subthreshold regime has been driven by the quest for minimum energy per operation. In this contri...
David Bol, Renaud Ambroise, Denis Flandre, Jean-Di...
VTS
2002
IEEE
107views Hardware» more  VTS 2002»
15 years 4 months ago
Testing High-Speed SoCs Using Low-Speed ATEs
We present a test methodology to allow testing high-speed circuits with low-speed ATEs. The basic strategy is adding an interface circuit to partially supply test data, coordinate...
Mehrdad Nourani, James Chin
GECCO
2004
Springer
182views Optimization» more  GECCO 2004»
15 years 4 months ago
On the Evolution of Analog Electronic Circuits Using Building Blocks on a CMOS FPTA
This article summarizes two experiments utilizing building blocks to find analog electronic circuits on a CMOS Field Programmable Transistor Array (FPTA). The FPTA features 256 pr...
Jörg Langeheine, Martin Trefzer, Daniel Br&uu...