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» Uncertainty-aware circuit optimization
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GECCO
2004
Springer
15 years 4 months ago
Evolving Quantum Circuits and Programs Through Genetic Programming
Abstract. Spector et al. have shown [1],[2],[3] that genetic programming can be used to evolve quantum circuits. In this paper, we present new results in this field, introducing p...
Paul Massey, John A. Clark, Susan Stepney
IOLTS
2003
IEEE
126views Hardware» more  IOLTS 2003»
15 years 4 months ago
Synthesis of Low-Cost Parity-Based Partially Self-Checking Circuits
A methodology for the synthesis of partially selfchecking multilevel logic circuits with low-cost paritybased concurrent error detection (CED) is described. A subset of the inputs...
Kartik Mohanram, Egor S. Sogomonyan, Michael G&oum...
ASPDAC
1999
ACM
144views Hardware» more  ASPDAC 1999»
15 years 3 months ago
Model Order Reduction of Large Circuits Using Balanced Truncation
A method is introduced for model order reduction of large circuits extracted from layout. The algorithm, which is based on balanced realization, can be used for reducing the order ...
Payam Rabiei, Massoud Pedram
ISLPED
1999
ACM
177views Hardware» more  ISLPED 1999»
15 years 3 months ago
Low power synthesis of dual threshold voltage CMOS VLSI circuits
The use of dual threshold voltages can significantly reduce the static power dissipated in CMOS VLSI circuits. With the supply voltage at 1V and threshold voltage as low as 0.2V ...
Vijay Sundararajan, Keshab K. Parhi
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
15 years 3 months ago
Synthesis of asynchronous control circuits with automatically generated relative timing assumptions
This paper describes a method of synthesis of asynchronous circuits with relative timing. Asynchronous communication between gates and modules typically utilizes handshakes to ens...
Jordi Cortadella, Michael Kishinevsky, Steven M. B...