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65
Voted
DATE
2007
IEEE
15 years 5 months ago
2007
IEEE
Formal verification is an important issue in circuit and system design. In this context, Bounded Model Checking (BMC) is one of the most successful techniques. But even if all sp...
IJFCS
2006
14 years 11 months ago
2006
The outcome of verifying software is often a `counterexample', i.e., a listing of the actions and states of a behavior not satisfying the specification. In order to understan...
196
Voted
Book
"These course notes are addressed to a wide audience of people interested in modern programming languages in general, ML-like languages in particular, or simply in OCaml, whet...
105
click to vote
RE
2004
Springer
15 years 4 months ago
2004
Springer
Due to the generality and complexity of enterprise systems, they are challenging to implement and deploy successfully in organizations. Many of these problems are rooted in the wa...
HICSS
2000
IEEE
15 years 3 months ago
2000
IEEE
This paper explores the impact of Enterprise Resource Planning (ERP) systems using the individual manufacturing facility as the level of analysis. A model of ERP costs and benefit...