402 search results - page 15 / 81 » Understanding transactional memory performance |
SPAA
2009
ACM
15 years 10 months ago
2009
ACM
In order to be efficient with selfish programmers, a multicore transactional memory (TM) system must be designed such that it is compatible with good programming incentives (GPI),...
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APCSAC
2007
IEEE
15 years 3 months ago
2007
IEEE
Although they have been the main server technology for many years, multiprocessors are undergoing a renaissance due to multi-core chips and the attractive scalability properties of...
HPCA
2006
IEEE
15 years 9 months ago
2006
IEEE
Transactional memory (TM) simplifies parallel programming by guaranteeing that transactions appear to execute atomically and in isolation. Implementing these properties includes p...
RV
2010
Springer
14 years 7 months ago
2010
Springer
Software transactional memories (STMs) promise simple and efficient concurrent programming. Several correctness properties have been proposed for STMs. Based on a bounded conflict ...
PLDI
2006
ACM
15 years 3 months ago
2006
ACM
Atomic blocks allow programmers to delimit sections of code as ‘atomic’, leaving the language’s implementation to enforce atomicity. Existing work has shown how to implement...