402 search results - page 26 / 81 » Understanding transactional memory performance |
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Voted
IJHPCA
2010
14 years 6 months ago
2010
Emergence of new parallel architectures presents new challenges for application developers. Supercomputers vary in processor speed, network topology, interconnect communication ch...
ISCA
2000
IEEE
15 years 1 months ago
2000
IEEE
For many applications, branch mispredictions and cache misses limit a processor’s performance to a level well below its peak instruction throughput. A small fraction of static i...
POPL
2010
ACM
15 years 6 months ago
2010
ACM
Traditional transactional memory systems suffer from overly conservative conflict detection, yielding so-called false conflicts, because they are based on fine-grained, low-level ...
VLDB
1997
ACM
15 years 1 months ago
1997
ACM
We present a design for multi-version concurrency control and recovery in a main memory database, and describe logical and physical versioning schemes that allow read-only transac...
VLDB
1992
ACM
15 years 1 months ago
1992
ACM
This paper presents a portable, efficient method for accessing memory resident persistent objects in virtual memory in the context of the E programming language. Under the approac...