402 search results - page 45 / 81 » Understanding transactional memory performance |
128
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ICSE
2009
IEEE-ACM
15 years 8 months ago
2009
IEEE-ACM
Many of today’s complex systems are multithreaded servers that effectively run forever and need to work under varying loads and environments. Understanding the behavior of such ...
PLDI
2012
ACM
13 years 3 months ago
2012
ACM
This paper addresses the problem of reducing unnecessary conflicts in optimistic synchronization. Optimistic synchronization must ensure that any two concurrently executing trans...
109
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SBACPAD
2007
IEEE
15 years 7 months ago
2007
IEEE
Code Compression has been used to alleviate the memory requirements as well as to improve performance and/or minimize energy consumption. On the other hand, implementing security ...
100
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MICRO
2008
IEEE
15 years 1 months ago
2008
IEEE
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
IEEEPACT
2006
IEEE
15 years 7 months ago
2006
IEEE
The address sequence on the processor-memory bus can reveal abundant information about the control flow of a program. This can lead to critical information leakage such as encryp...