402 search results - page 60 / 81 » Understanding transactional memory performance |
71
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ASPLOS
2010
ACM
15 years 4 months ago
2010
ACM
This paper introduces a new abstraction to accelerate the readbarriers and write-barriers used by language runtime systems. We exploit the fact that, dynamically, many barrier exe...
PC
2010
14 years 7 months ago
2010
Compute unified device architecture (CUDA) is a software development platform that allows us to run C-like programs on the nVIDIA graphics processing unit (GPU). This paper prese...
NOCS
2007
IEEE
15 years 3 months ago
2007
IEEE
The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...
102
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CORR
2010
Springer
14 years 9 months ago
2010
Springer
We consider the problem of revenue-optimal dynamic mechanism design in settings where agents' types evolve over time as a function of their (both public and private) experien...
SIGMETRICS
2005
ACM
15 years 3 months ago
2005
ACM
This paper examines the performance of simultaneous multithreading (SMT) for network servers using actual hardware, multiple network server applications, and several workloads. Us...