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» Unifying synchronous asynchronous state machine synthesis
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ISCAS
2002
IEEE
125views Hardware» more  ISCAS 2002»
13 years 11 months ago
Switching activity estimation of finite state machines for low power synthesis
A technique for computing the switching activity of synchronous Finite State Machine (FSM) implementations including the influence of temporal correlation among the next state si...
Mikael Kerttu, Per Lindgren, Mitchell A. Thornton,...
DAC
1997
ACM
13 years 10 months ago
Automatic Generation of Synchronous Test Patterns for Asynchronous Circuits
This paper presents a novel approach for automatic test pattern generation of asynchronous circuits. The techniques used for this purpose assume that the circuit can only be exerc...
Oriol Roig, Jordi Cortadella, Marco A. Peña...
VLSID
2005
IEEE
87views VLSI» more  VLSID 2005»
14 years 6 months ago
Synthesis of Asynchronous Circuits Using Early Data Validity
Interest in asynchronous circuit design is increasing due to its promise of efficient designs. The quiescent nature of asynchronous circuits allows them to remain in a stable stat...
Nitin Gupta, Doug A. Edwards
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
13 years 10 months ago
OPTIMISTA: state minimization of asynchronous FSMs for optimum output logic
The optimal state minimization problem is to select a reduced state machine having the best logic implementation over all possible state reductions and encodings. A recent algorit...
Robert M. Fuhrer, Steven M. Nowick
FASE
2007
Springer
14 years 13 days ago
Activity-Driven Synthesis of State Machines
The synthesis of object behaviour from scenarios is a well-known and important issue in the transition from system analysis to system design. We describe a model transformation pro...
Rolf Hennicker, Alexander Knapp