103 search results - page 10 / 21 » UnitCheck: Unit Testing and Model Checking Combined |
TCAD
2010
14 years 4 months ago
2010
Abstract--Functional verification is one of the major bottlenecks in system-on-chip design due to the combined effects of increasing complexity and lack of automated techniques for...
119
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VLSID
2010
IEEE
14 years 7 months ago
2010
IEEE
Directed test generation is important for the functional verification of complex system-on-chip designs. SAT based bounded model checking is promising for counterexample generatio...
DSRT
2008
IEEE
15 years 4 months ago
2008
IEEE
This paper describes a new property checking approach in order to enhance the diagnosis ability of an electronic embedded system, included in an automotive application. We conside...
109
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DATE
1999
IEEE
15 years 1 months ago
1999
IEEE
Boolean Satisfiability is a ubiquitous modeling tool in Electronic Design Automation, It finds application in test pattern generation, delay-fault testing, combinational equivalen...
CAV
2009
Springer
15 years 10 months ago
2009
Springer
We present HOMER, an observational-equivalence model checker for the 3rd-order fragment of Idealized Algol (IA) augmented with iteration. It works by first translating terms of the...