54 search results - page 2 / 11 » Update-Based Cache Coherence Protocols for Scalable Shared-M... |
ISCA
2011
IEEE
12 years 10 months ago
2011
IEEE
As we move to large manycores, the hardware-based global checkpointing schemes that have been proposed for small shared-memory machines do not scale. Scalability barriers include ...
MAM
2002
13 years 6 months ago
2002
Bus-based shared memory multiprocessors with private caches and snooping write-invalidate cache coherence protocols are dominant form of small- to medium-scale parallel machines t...
IPPS
1993
IEEE
13 years 10 months ago
1993
IEEE
ICPP
1996
IEEE
13 years 10 months ago
1996
IEEE
ISCA
1995
IEEE
13 years 9 months ago
1995
IEEE
This paper introduces dynamic self-invalidation (DSI), a new technique for reducing cache coherence overhead in shared-memory multiprocessors. DSI eliminates invalidation messages...