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ICPR
2004
IEEE
15 years 11 months ago
An FPGA-Based Architecture for Real Time Image Feature Extraction
We propose a novel FPGA-based architecture for the extraction of four texture features using Gray Level Cooccurrence Matrix (GLCM) analysis. These features are angular second mome...
Dimitrios E. Maroulis, Dimitrios K. Iakovidis, Dim...
CD
2004
Springer
15 years 3 months ago
Customizing Component-Based Architectures by Contract
This paper presents an approach to describe, deploy and manage component-based applications having dynamic functional and non-functional requirements. The approach is centered on a...
Orlando Loques, Alexandre Sztajnberg
ICCD
2003
IEEE
113views Hardware» more  ICCD 2003»
15 years 3 months ago
Multiple Transition Model and Enhanced Boundary Scan Architecture to Test Interconnects for Signal Integrity
As the technology is shrinking toward 50 nm and the working frequency is going into multi gigahertz range, the effect of interconnects on functionality and performance of system-o...
Mohammad H. Tehranipour, Nisar Ahmed, Mehrdad Nour...
MICRO
2002
IEEE
104views Hardware» more  MICRO 2002»
15 years 2 months ago
Compiling for instruction cache performance on a multithreaded architecture
Instruction cache aware compilation seeks to lay out a program in memory in such a way that cache conflicts between procedures are minimized. It does this through profile-driven...
Rakesh Kumar, Dean M. Tullsen
DAC
2009
ACM
15 years 11 months ago
Double patterning lithography friendly detailed routing with redundant via consideration
In double patterning lithography (DPL), coloring conflict and stitch minimization are the two main challenges. Post layout decomposition algorithm [1] [2]may not be enough to achi...
Kun Yuan, Katrina Lu, David Z. Pan