In this paper we describe a design exploration methodology for clustered VLIW architectures. The central idea of this work is a set of three techniques aimed at reducing the cost ...
Marcio Buss, Rodolfo Azevedo, Paulo Centoducatte, ...
For the next generation of multi-core processors, the onchip interconnection networks must be efficient to achieve high data throughput and performance. Moreover, these interconne...
Henrique C. Freitas, Philippe Olivier Alexandre Na...
Abstract. In this paper we propose a structured approach for the simulation of the human body which is comprehensive and extendable. Our architecture resembles the human organism a...
Sebastian Ullrich, Jakob Valvoda, Andreas Prescher...
Driven by the ongoing demographical, structural, and social changes in all modern, industrialized countries, there is a huge interest in IT-based equipment and services these days...
We present an efficient built-in self-test (BIST) architecture for testing and diagnosing stuck-at faults, delay faults, and bridging faults in FPGA interconnect resources. The BIS...