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FCCM
2003
IEEE
148views VLSI» more  FCCM 2003»
15 years 4 months ago
A Hardware Gaussian Noise Generator for Channel Code Evaluation
Hardware simulation of channel codes offers the potential of improving code evaluation speed by orders of magnitude over workstation- or PC-based simulation. We describe a hardwar...
Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y...
EUROCRYPT
2009
Springer
16 years 5 days ago
Smashing SQUASH-0
At the RFID Security Workshop 2007, Adi Shamir presented a new challenge-response protocol well suited for RFIDs, although based on the Rabin public-key cryptosystem. This protocol...
Khaled Ouafi, Serge Vaudenay
VLSISP
2008
173views more  VLSISP 2008»
14 years 11 months ago
Fast Bit Gather, Bit Scatter and Bit Permutation Instructions for Commodity Microprocessors
Advanced bit manipulation operations are not efficiently supported by commodity word-oriented microprocessors. Programming tricks are typically devised to shorten the long sequence...
Yedidya Hilewitz, Ruby B. Lee
VEE
2010
ACM
327views Virtualization» more  VEE 2010»
15 years 6 months ago
AASH: an asymmetry-aware scheduler for hypervisors
Asymmetric multicore processors (AMP) consist of cores exposing the same instruction-set architecture (ISA) but varying in size, frequency, power consumption and performance. AMPs...
Vahid Kazempour, Ali Kamali, Alexandra Fedorova
104
Voted
CORR
2008
Springer
173views Education» more  CORR 2008»
14 years 11 months ago
Decomposition Principles and Online Learning in Cross-Layer Optimization for Delay-Sensitive Applications
In this paper, we propose a general cross-layer optimization framework in which we explicitly consider both the heterogeneous and dynamically changing characteristics of delay-sens...
Fangwen Fu, Mihaela van der Schaar