This paper focuses on statistical interconnect timing analysis in a parameterized block-based statistical static timing analysis tool. In particular, a new framework for performin...
Static timing analysis is a critical step in design of any digital integrated circuit. Technology and design trends have led to significant increase in environmental and process v...
This paper advocates a strict compositional and hybrid approach for obtaining key (performance) metrics of embedded At its core the developed methodology abstracts system componen...
Within-die process variations arise during integrated circuit (IC) fabrication in the sub-100nm regime. These variations are of paramount concern as they deviate the performance of...
We present a novel algorithm for detection of certain types of unusual events. The algorithm is based on multiple local monitors which collect low-level statistics. Each local moni...
Amit Adam, Ehud Rivlin, Ilan Shimshoni, David Rein...