4445 search results - page 9 / 889 » Use of statistical timing analysis on real designs |
GLVLSI
2003
IEEE
15 years 2 months ago
2003
IEEE
Design and implementation of a fast parallel architecture based on an improved principal component analysis (PCA) method called Composite PCA suitable for real-time face recogniti...
ISQED
2009
IEEE
15 years 4 months ago
2009
IEEE
A system-level statistical analysis methodology is described that captures the impact of inter- and intra-die process variations for read timing failures in SRAM circuit blocks. U...
DAC
2006
ACM
15 years 10 months ago
2006
ACM
In designing bus based systems with parallel and pipelined architecture, it is important to derive a real time budget (a specified execution time limit) for each task of a bus bas...
98
Voted
FDL
2006
IEEE
15 years 3 months ago
2006
IEEE
To ensure correctness and performance of real-time embedded systems, early evaluation of properties is needed. Based on design experience for real-time systems and using the conce...
106
Voted
GLVLSI
2006
IEEE
15 years 3 months ago
2006
IEEE
Process technology and environment-induced variability of gates and wires in VLSI circuits make timing analyses of such circuits a challenging task. Process variation can have a s...