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» Using ATL for Checking Models
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PDPTA
2003
15 years 6 months ago
A Universal Parallel SAT Checking Kernel
We present a novel approach to parallel Boolean satisfiability (SAT) checking. A distinctive feature of our parallel SAT checker is that it incorporates all essential heuristics ...
Wolfgang Blochinger, Carsten Sinz, Wolfgang Kü...
123
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SPIN
2007
Springer
15 years 11 months ago
SAT-Based Summarization for Boolean Programs
Boolean programs are frequently used to model abstractions of software programs. They have the advantage that reachability properties are decidable, despite the fact that their sta...
Gérard Basler, Daniel Kroening, Georg Weiss...
ATAL
2008
Springer
15 years 7 months ago
Towards verifying compliance in agent-based web service compositions
We explore the problem of specification and verification of compliance in agent based Web service compositions. We use the formalism of temporal-epistemic logic suitably extended ...
Alessio Lomuscio, Hongyang Qu, Monika Solanki
DATE
2010
IEEE
138views Hardware» more  DATE 2010»
15 years 10 months ago
Checking and deriving module paths in Verilog cell library descriptions
—Module paths are often used to specify the delays of cells in a Verilog cell library description, which define the propagation delay for an event from an input to an output. Sp...
Matthias Raffelsieper, Mohammad Reza Mousavi, Chri...
ASIACRYPT
2003
Springer
15 years 10 months ago
Incremental Multiset Hash Functions and Their Application to Memory Integrity Checking
We introduce a new cryptographic tool: multiset hash functions. Unlike standard hash functions which take strings as input, multiset hash functions operate on multisets (or sets). ...
Dwaine E. Clarke, Srinivas Devadas, Marten van Dij...