70 search results - page 8 / 14 » Using Abstraction in the Verification of Simulation Coercion |
ICCAD
2009
IEEE
14 years 7 months ago
2009
IEEE
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
75
Voted
CN
2008
14 years 9 months ago
2008
Abstract-- Routers in the Internet do not perform any verification of the source IP address contained in the packets, leading to the possibility of IP spoofing. The lack of such ve...
DAC
1994
ACM
15 years 1 months ago
1994
ACM
Abstract - We address the problem of automatically verifying large digital designs at the logic level, against high-level specifications. In this paper, we present a methodology wh...
FDL
2005
IEEE
15 years 3 months ago
2005
IEEE
This paper presents an approach for modeling an inertial navigation system. This system consists of a 3D acceleration and rotation sensor array, analog and digital error correctio...
DATE
2003
IEEE
15 years 3 months ago
2003
IEEE
The design of high performance multimedia systems in a short time force us to use IP's blocks in many designs. However, their correct integration in a design implies more com...