2065 search results - page 131 / 413 » Using Architectural Models at Runtime: Research Challenges |
135
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DAC
2005
ACM
16 years 5 months ago
2005
ACM
In the design of highly complex, heterogeneous, and concurrent systems, deadlock detection and resolution remains an important issue. In this paper, we systematically analyze the ...
164
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PPL
2008
15 years 4 months ago
2008
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
133
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WSC
1997
15 years 5 months ago
1997
Evaluating, analyzing and predicting the performance of a parallel system is challenging due to the complex inter-play between the application characteristics and architectural fe...
147
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IPPS
2002
IEEE
15 years 9 months ago
2002
IEEE
Multiple memory module architecture enjoys higher memory access bandwidth and thus higher performance. Two key problems in gaining high performance in this kind of architecture ar...
174
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HPCC
2007
Springer
15 years 8 months ago
2007
Springer
Vector, emerging (homogenous and heterogeneous) multi-core and a number of accelerator processing devices potentially offer an order of magnitude speedup for scientific application...