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IPPS
2002
IEEE
15 years 2 months ago
Memory-Intensive Benchmarks: IRAM vs. Cache-Based Machines
The increasing gap between processor and memory performance has led to new architectural models for memory-intensive applications. In this paper, we use a set of memory-intensive ...
Brian R. Gaeke, Parry Husbands, Xiaoye S. Li, Leon...
ICPPW
2006
IEEE
15 years 3 months ago
Model-Based OpenMP Implementation of a 3D Facial Pose Tracking System
Abstract— Most image processing applications are characterized by computation-intensive operations, and high memory and performance requirements. Parallelized implementation on s...
Sankalita Saha, Chung-Ching Shen, Chia-Jui Hsu, Ga...
AHS
2006
IEEE
124views Hardware» more  AHS 2006»
15 years 3 months ago
A Generic On-Chip Debugger for Wireless Sensor Networks
— This invited paper overviews the low level debug support hardware required for an on-chip predeployment debugging system for sensor networks. The solution provides significant...
Andrew B. T. Hopkins, Klaus D. McDonald-Maier
97
Voted
TC
2010
14 years 8 months ago
Design and Analysis of On-Chip Networks for Large-Scale Cache Systems
—Switched networks have been adopted in on-chip communication for their scalability and efficient resource sharing. However, using a general network for a specific domain may res...
Yuho Jin, Eun Jung Kim, Ki Hwan Yum
ENTCS
2006
158views more  ENTCS 2006»
14 years 9 months ago
Towards a Subject-Oriented Model-Driven Framework
Model-Driven Architecture is an approach of the OMG, its objective is to tackle problems such as: the high availability that a software product requires to be ready for use, the h...
Pablo Amaya, Carlos González, Juan M. Muril...