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ASPLOS
2006
ACM
16 years 19 days ago
Software-based instruction caching for embedded processors
While hardware instruction caches are present in virtually all general-purpose and high-performance microprocessors today, many embedded processors use SRAM or scratchpad memories...
Jason E. Miller, Anant Agarwal
PADL
2004
Springer
16 years 15 hour ago
Symbolic Execution of Behavioral Requirements
Message Sequence Charts (MSC) have traditionally been used as a weak form of behavioral requirements in software design; they denote scenarios which may happen. Live Sequence Chart...
Tao Wang, Abhik Roychoudhury, Roland H. C. Yap, S....
CCS
2008
ACM
15 years 8 months ago
Minimal backups of cryptographic protocol runs
As cryptographic protocols execute they accumulate information such as values and keys, and evidence of properties about this information. As execution proceeds, new information b...
Jay A. McCarthy, Shriram Krishnamurthi
184
Voted
CCS
2008
ACM
15 years 8 months ago
Formal analysis of SAML 2.0 web browser single sign-on: breaking the SAML-based single sign-on for google apps
Single-Sign-On (SSO) protocols enable companies to establish a federated environment in which clients sign in the system once and yet are able to access to services offered by dif...
Alessandro Armando, Roberto Carbone, Luca Compagna...
CODES
2006
IEEE
15 years 8 months ago
Architectural support for safe software execution on embedded processors
The lack of memory safety in many popular programming languages, including C and C++, has been a cause for great concern in the realm of software reliability, verification, and mo...
Divya Arora, Anand Raghunathan, Srivaths Ravi, Nir...
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