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IPPS
2000
IEEE
15 years 7 months ago
Reducing Ownership Overhead for Load-Store Sequences in Cache-Coherent Multiprocessors
Parallel programs that modify shared data in a cachecoherent multiprocessor with a write-invalidate coherence protocol create ownership overhead in the form of ownership acquisiti...
Jim Nilsson, Fredrik Dahlgren
IPPS
1999
IEEE
15 years 6 months ago
Parallel Load Balancing for Problems with Good Bisectors
Parallel load balancing is studied for problems with certain bisection properties. A class of problems has bisectors if every problem p of weight wp in the class can be subdivided...
Stefan Bischof, Ralf Ebner, Thomas Erlebach
98
Voted
ICS
1999
Tsinghua U.
15 years 6 months ago
Low-level router design and its impact on supercomputer system performance
Supercomputer performance is highly dependent on its interconnection subsystem design. In this paper we study how di erent architectural approaches for router design impact into s...
Valentin Puente, José A. Gregorio, Cruz Izu...
101
Voted
HPCA
1998
IEEE
15 years 6 months ago
Virtual-Physical Registers
A novel dynamic register renaming approach is proposed in this work. The key idea of the novel scheme is to delay the allocation of physical registers until a late stage in the pi...
Antonio González, José Gonzál...
146
Voted
HPCA
1998
IEEE
15 years 6 months ago
Performance Study of a Concurrent Multithreaded Processor
The performance of a concurrent multithreaded architectural model, called superthreading 15 , is studied in this paper. It tries to integrate optimizing compilation techniques and...
Jenn-Yuan Tsai, Zhenzhen Jiang, Eric Ness, Pen-Chu...