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PPOPP
2005
ACM
15 years 3 months ago
Exposing disk layout to compiler for reducing energy consumption of parallel disk based systems
Disk subsystem is known to be a major contributor to overall power consumption of high-end parallel systems. Past research proposed several architectural level techniques to reduc...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir, A...
IPPS
2003
IEEE
15 years 3 months ago
BLAM : A High-Performance Routing Algorithm for Virtual Cut-Through Networks
High performance, freedom from deadlocks, and freedom from livelocks are desirable properties of interconnection networks. Unfortunately, these can be conflicting goals because n...
Mithuna Thottethodi, Alvin R. Lebeck, Shubhendu S....
ISHPC
1999
Springer
15 years 1 months ago
Utilization of Cache Area in On-Chip Multiprocessor
On-chip multiprocessor can be an alternative to the wide-issue superscalar processor approach which is currently the mainstream to exploit the increasing number of transistors on ...
Hitoshi Oi, N. Ranganathan
HPDC
1997
IEEE
15 years 1 months ago
Supporting Parallel Applications on Clusters of Workstations: The Intelligent Network Interface Approach
This paper presents a novel networking architecture designed for communication intensive parallel applications running on clusters of workstations (COWs) connected by highspeed ne...
Marcel-Catalin Rosu, Karsten Schwan, Richard Fujim...
102
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EDCC
2006
Springer
15 years 1 months ago
SEU Mitigation Techniques for Microprocessor Control Logic
The importance of fault tolerance at the processor architecture level has been made increasingly important due to rapid advancements in the design and usage of high performance de...
T. S. Ganesh, Viswanathan Subramanian, Arun K. Som...