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CGO
2010
IEEE
14 years 1 months ago
Integrated instruction selection and register allocation for compact code generation exploiting freeform mixing of 16- and 32-bi
For memory constrained embedded systems code size is at least as important as performance. One way of increasing code density is to exploit compact instruction formats, e.g. ARM T...
Tobias J. K. Edler von Koch, Igor Böhm, Bj&ou...
ISCA
2009
IEEE
158views Hardware» more  ISCA 2009»
14 years 26 days ago
Boosting single-thread performance in multi-core systems through fine-grain multi-threading
Industry has shifted towards multi-core designs as we have hit the memory and power walls. However, single thread performance remains of paramount importance since some applicatio...
Carlos Madriles, Pedro López, Josep M. Codi...
LCTRTS
2007
Springer
14 years 11 days ago
Tetris: a new register pressure control technique for VLIW processors
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
Weifeng Xu, Russell Tessier
VLDB
2001
ACM
109views Database» more  VLDB 2001»
13 years 10 months ago
Analyzing energy behavior of spatial access methods for memory-resident data
The proliferation of mobile and pervasive computing devices has brought energy constraints into the limelight, together with performance considerations. Energy-conscious design is...
Ning An, Anand Sivasubramaniam, Narayanan Vijaykri...
AROBOTS
2007
159views more  AROBOTS 2007»
13 years 6 months ago
Structure-based color learning on a mobile robot under changing illumination
— A central goal of robotics and AI is to be able to deploy an agent to act autonomously in the real world over an extended period of time. To operate in the real world, autonomo...
Mohan Sridharan, Peter Stone