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RTAS
2010
IEEE
14 years 8 months ago
DARTS: Techniques and Tools for Predictably Fast Memory Using Integrated Data Allocation and Real-Time Task Scheduling
—Hardware-managed caches introduce large amounts of timing variability, complicating real-time system design. One alternative is a memory system with scratchpad memories which im...
Sangyeol Kang, Alexander G. Dean
IPPS
1998
IEEE
15 years 1 months ago
Eliminating the Protocol Stack for Socket Based Communication in Shared Memory Interconnects
We show how the traditional protocol stack, such as TCP/IP, can be eliminated for socket based high speed communication within a cluster. The SCI shared memory interconnect is used...
Stein Jørgen Ryan, Haakon Bryhni
ICLP
2011
Springer
14 years 29 days ago
Constraints in Non-Boolean Contexts
In high-level constraint modelling languages, constraints can occur in non-Boolean contexts: implicitly, in the form of partial functions, or more explicitly, in the form of const...
Leslie De Koninck, Sebastian Brand, Peter J. Stuck...
100
Voted
TCS
2008
14 years 9 months ago
Loop detection in term rewriting using the eliminating unfoldings
In this paper, we present a fully automatizable approach to detecting loops in standard term rewriting. Our method is based on semi-unification and an unfolding operation which pr...
Étienne Payet
66
Voted
DATE
2002
IEEE
123views Hardware» more  DATE 2002»
15 years 2 months ago
False Path Elimination in Quasi-Static Scheduling
We have developed a technique to compute a Quasi Static Schedule of a concurrent specification for the software partition of an embedded system. Previous work did not take into a...
G. Arrigoni, L. Duchini, Claudio Passerone, Lucian...