78 search results - page 14 / 16 » Using Decision Diagrams to Design ULMs for FPGAs |
DAC
2010
ACM
13 years 10 months ago
2010
ACM
State-of-the-art automatic reliability analyses as used in system-level design approaches mainly rely on Binary Decision Diagrams (BDDs) and, thus, face two serious problems: (1) ...
IWPC
2007
IEEE
14 years 15 days ago
2007
IEEE
A commonly used strategy to address the scalability challenge in object-oriented reverse engineering is to synthesize coarse-grained representations, such as package diagrams. How...
ATVA
2007
Springer
14 years 13 days ago
2007
Springer
Fault tree analysis is a traditional and well-established technique for analyzing system design and robustness. Its purpose is to identify sets of basic events, called cut sets, wh...
TACAS
2001
Springer
13 years 10 months ago
2001
Springer
Multi-valued logics support the explicit modeling of uncertainty and disagreement by allowing additional truth values in the logic. Such logics can be used for verification of dyn...
TABLEAUX
1998
Springer
13 years 10 months ago
1998
Springer
ple (Extended Abstract) Edmund M. Clarke and Sergey Berezin Carnegie Mellon University -- USA Model checking is an automatic verification technique for finite state concurrent syst...