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» Using Execution Trace Data to Improve Distributed Systems
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83
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ASPLOS
2004
ACM
15 years 3 months ago
An ultra low-power processor for sensor networks
We present a novel processor architecture designed specifically for use in low-power wireless sensor-network nodes. Our sensor network asynchronous processor (SNAP/LE) is based on...
Virantha N. Ekanayake, Clinton Kelly IV, Rajit Man...
77
Voted
BDA
2006
14 years 11 months ago
Type-Based XML Projection
XML data projection (or pruning) is one of the main optimization techniques recently adopted in the context of main-memory XML query-engines. The underlying idea is quite simple: ...
Véronique Benzaken, Giuseppe Castagna, Dari...
TVLSI
2010
14 years 4 months ago
C-Pack: A High-Performance Microprocessor Cache Compression Algorithm
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
Xi Chen, Lei Yang, Robert P. Dick, Li Shang, Haris...
OSDI
2002
ACM
15 years 10 months ago
Optimizing the Migration of Virtual Computers
This paper shows how to quickly move the state of a running computer across a network, including the state in its disks, memory, CPU registers, and I/O devices. We call this state...
Constantine P. Sapuntzakis, Ramesh Chandra, Ben Pf...
ISCA
2000
IEEE
156views Hardware» more  ISCA 2000»
15 years 2 months ago
CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit
Reconfigurable hardware has the potential for significant performance improvements by providing support for applicationāˆ’specific operations. We report our experience with Chimae...
Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithv...