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» Using FPGAs to solve the Hamiltonian cycle problem
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91
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FPGA
1997
ACM
127views FPGA» more  FPGA 1997»
15 years 3 months ago
General Modeling and Technology-Mapping Technique for LUT-Based FPGAs
We present a general approach to the FPGA technology mapping problem that applies to any logic block composed of lookup tables LUTs and can yield optimal solutions. The connecti...
Amit Chowdhary, John P. Hayes
114
Voted
ICCAD
1999
IEEE
153views Hardware» more  ICCAD 1999»
15 years 4 months ago
Cycle time and slack optimization for VLSI-chips
We consider the problem of finding an optimal clock schedule, i.e. optimal arrival times for clock signals at latches of a VLSI chip. We describe a general model which includes al...
Christoph Albrecht, Bernhard Korte, Jürgen Sc...
ISCAS
2006
IEEE
112views Hardware» more  ISCAS 2006»
15 years 5 months ago
Fine-grain thermal profiling and sensor insertion for FPGAs
– Increasing logic densities and clock frequencies on FPGAs lead to rapid increase in power density, which translates to higher on-chip temperature. In this paper, we investigate...
Somsubhra Mondal, Rajarshi Mukherjee, Seda Ogrenci...
78
Voted
AHS
2006
IEEE
133views Hardware» more  AHS 2006»
15 years 5 months ago
Gate-level Morphogenetic Evolvable Hardware for Scalability and Adaptation on FPGAs
Traditional approaches to evolvable hardware (EHW), in which the field programmable gate array (FPGA) configuration is directly encoded, have not scaled well with increasing cir...
Justin Lee, Joaquin Sitte
ICCAD
2003
IEEE
219views Hardware» more  ICCAD 2003»
15 years 8 months ago
A Min-Cost Flow Based Detailed Router for FPGAs
Routing for FPGAs has been a very challenging problem due to the limitation of routing resources. Although the FPGA routing problem has been researched extensively, most algorithm...
Seokjin Lee, Yongseok Cheon, Martin D. F. Wong