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LCPC
2009
Springer
13 years 10 months ago
A Balanced Approach to Application Performance Tuning
Abstract. Current hardware trends place increasing pressure on programmers and tools to optimize scientific code. Numerous tools and techniques exist, but no single tool is a pana...
Souad Koliai, Stéphane Zuckerman, Emmanuel ...
ACMMSP
2006
ACM
252views Hardware» more  ACMMSP 2006»
14 years 7 days ago
Deconstructing process isolation
Most operating systems enforce process isolation through hardware protection mechanisms such as memory segmentation, page mapping, and differentiated user and kernel instructions....
Mark Aiken, Manuel Fähndrich, Chris Hawblitze...
ICCAD
2008
IEEE
127views Hardware» more  ICCAD 2008»
14 years 3 months ago
System-level power estimation using an on-chip bus performance monitoring unit
In this paper we propose an on-chip bus PMU which makes accurate estimates of system power consumption from a first-order linear power model by utilizing system-level activity in...
Youngjin Cho, Younghyun Kim, Sangyoung Park, Naehy...
ICCD
2006
IEEE
97views Hardware» more  ICCD 2006»
14 years 3 months ago
Pesticide: Using SMT Processors to Improve Performance of Pointer Bug Detection
Pointer bugs associated with dynamically-allocated objects resulting in out-of-bounds memory access are an important class of software bugs. Because such bugs cannot be detected e...
Jin-Yi Wang, Yen-Shiang Shue, T. N. Vijaykumar, Sa...
DATE
2009
IEEE
176views Hardware» more  DATE 2009»
14 years 1 months ago
Single ended 6T SRAM with isolated read-port for low-power embedded systems
Abstract— This paper presents a six-transistor (6T) singleended static random access memory (SE-SRAM) bitcell with an isolated read-port, suitable for low-Î and low-power embedd...
Jawar Singh, Dhiraj K. Pradhan, Simon Hollis, Sara...