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FCCM
2003
IEEE
148views VLSI» more  FCCM 2003»
15 years 8 months ago
A Hardware Gaussian Noise Generator for Channel Code Evaluation
Hardware simulation of channel codes offers the potential of improving code evaluation speed by orders of magnitude over workstation- or PC-based simulation. We describe a hardwar...
Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y...
ESOP
2010
Springer
16 years 20 days ago
Generative Operational Semantics for Relaxed Memory Models
The specification of the Java Memory Model (JMM) is phrased in terms of acceptors of execution sequences rather than the standard generative view of operational semantics. This cre...
Radha Jagadeesan, Corin Pitcher and James Riely
VLSID
2002
IEEE
174views VLSI» more  VLSID 2002»
16 years 3 months ago
Architecture Implementation Using the Machine Description Language LISA
The development of application specific instruction set processors comprises several design phases: architecture exploration, software tools design, system verification and design...
Oliver Schliebusch, Andreas Hoffmann, Achim Nohl, ...
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DATE
2009
IEEE
90views Hardware» more  DATE 2009»
15 years 10 months ago
Property analysis and design understanding
—Verification is a major issue in circuit and system design. Formal methods like bounded model checking (BMC) can guarantee a high quality of the verification. There are severa...
Ulrich Kühne, Daniel Große, Rolf Drechs...
ECCV
2002
Springer
16 years 5 months ago
Tracking and Rendering Using Dynamic Textures on Geometric Structure from Motion
Estimating geometric structure from uncalibrated images accurately enough for high quality rendering is difficult. We present a method where only coarse geometric structure is trac...
Dana Cobzas, Martin Jägersand