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ISCAS
1994
IEEE
138views Hardware» more  ISCAS 1994»
15 years 1 months ago
High-Throughput Data Compressor Designs Using Content Addressable Memory
This paper presents a novel VLSI architecture for high-speed data compressor designs which implement the well-known LZ77 algorithm. The architecture mainly consists of three units...
Ren-Yang Yang, Chen-Yi Lee
JCDL
2006
ACM
71views Education» more  JCDL 2006»
15 years 3 months ago
Using controlled query generation to evaluate blind relevance feedback algorithms
Currently in document retrieval there are many algorithms each with different strengths and weakness. There is some difficulty, however, in evaluating the impact of the test quer...
Chris Jordan, Carolyn R. Watters, Qigang Gao
WMPI
2004
ACM
15 years 3 months ago
A compressed memory hierarchy using an indirect index cache
Abstract. The large and growing impact of memory hierarchies on overall system performance compels designers to investigate innovative techniques to improve memory-system efficienc...
Erik G. Hallnor, Steven K. Reinhardt
COOPIS
2002
IEEE
15 years 2 months ago
Composing and Deploying Grid Middleware Web Services Using Model Driven Architecture
Rapid advances in networking, hardware, and middleware technologies are facilitating the development and deployment of complex grid applications, such as large-scale distributed co...
Aniruddha S. Gokhale, Balachandran Natarajan
TKDE
1998
163views more  TKDE 1998»
14 years 9 months ago
A Highly Effective Partition Selection Policy for Object Database Garbage Collection
—We investigate methods to improve the performance of algorithms for automatic storage reclamation of object databases. These algorithms are based on a technique called partition...
Jonathan E. Cook, Alexander L. Wolf, Benjamin G. Z...