18 search results - page 4 / 4 » Using Symbolic Algebra in Algorithmic Level DSP Synthesis |
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DSD
2010
IEEE
14 years 10 months ago
2010
IEEE
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
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ICCAD
1995
IEEE
15 years 3 months ago
1995
IEEE
ng certain electrical noise and power constraints.Abstract: We present a new delay model for use in logic synthesis. A traditional model treats the area of a library cell as consta...
STTT
2008
15 years 6 days ago
2008
1 This papers introduces a generic framework for OBDD variants with weighted edges. It covers many boolean and multi-valued OBDD-variants that have been studied in the literature a...