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TIM
2010
294views Education» more  TIM 2010»
15 years 1 months ago
Standby Leakage Power Reduction Technique for Nanoscale CMOS VLSI Systems
In this paper, a novel low-power design technique is proposed to minimize the standby leakage power in nanoscale CMOS very large scale integration (VLSI) systems by generating the ...
HeungJun Jeon, Yong-Bin Kim, Minsu Choi
CODES
2006
IEEE
16 years 22 days ago
Battery discharge aware energy feasibility analysis
It is observed that pulsed discharge currents allow to drain the battery with a higher specific power. Thus they improve the batteries durability and discharge performance. The q...
Henrik Lipskoch, Karsten Albers, Frank Slomka
CLEF
2006
Springer
15 years 10 months ago
TALP at GeoCLEF 2006: Experiments Using JIRS and Lucene with the ADL Feature Type Thesaurus
This paper describes our experiments in Geographical Information Retrieval (GIR) in the context of our participation in the GeoCLEF 2006 Monolingual English task. The TALPGeoIR sy...
Daniel Ferrés, Horacio Rodríguez
VRML
2004
ACM
16 years 3 days ago
PathSim visualizer: an Information-Rich Virtual Environment framework for systems biology
Increasingly, biology researchers and medical practitioners are using computational tools to model and analyze dynamic systems across scales from the macro to the cellular to the ...
Nicholas F. Polys, Doug A. Bowman, Chris North, Re...
ISLPED
2009
ACM
132views Hardware» more  ISLPED 2009»
16 years 1 months ago
Enabling ultra low voltage system operation by tolerating on-chip cache failures
Extreme technology integration in the sub-micron regime comes with a rapid rise in heat dissipation and power density for modern processors. Dynamic voltage scaling is a widely us...
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott ...